Raghupathi S
Architecture: Chiplets, ScaleUp-ScaleOut Networks, Ethernet Subsystems
- Role
- Senior Principal Engineer at Marvell Technology
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Raghupathi S
nearly two decades of experience in micro-architecture, IP design, Subsystem design, and ASIC/FPGA design. Leadership quality in executing multiple projects from concept to product. Proficient in various aspects of the RTL design flow, including synthesis, floor-planning, place & route and timing closure. Worked in different areas of IP development for FPGAs with focus on designing with High Speed SerDes architectures and with protocols like Ethernet, PCIe, OTN, SONET/SDH, Fibre Channel, CPRI. for networking products.
Experience
Senior Principal Engineer
Jan 2026 — Present
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