Raghunath Avvaru

About Raghunath Avvaru

Working as SoC Design Engineer at Intel, Bangalore.• MS in Analogue and Digital Integrated Circuit Design from Imperial College London.• Experience of multi-million chip tape outs.• Good Understanding of block level Synthesis, Physical design and verification concepts like APR, CTS, DRC/LVS, DFM, and STA.• Good Understanding of Full Chip Physical design and verification concepts.• Practical exposure to Physical Design tools like IC Complier, Design Compiler, Primetime, ICWBEV, Parade (Intel), Calibre tools.• Good understanding of fundamentals of CMOS & Finfet Transistors, Digital Logic Design, Deep sub-micron IC Fabrication process, ASIC and Custom flows.• Good knowledge of TCL scripting, RTL coding, Linux. • Hobbies: Short film making, playing long Tennis etc.

Experience

1. Senior Staff Engineer

   Qualcomm

   Jan 2026 — Present · Bengaluru, IN

Education

• Vellore Institute of Technology

  Bachelor of Technology (B.Tech.), Electronics and Communications Engineering

• Imperial College London

  Master of Science (MSc), Analogue and Digital Integrated Circuit Design

• RV VLSI

  Physical Design Engineer Trainee, ASIC Design

Skills

• Physical Design
• Digital Circuit Design
• Windows
• Semiconductors
• Microprocessors
• Matlab
• Logic Design
• Synplify
• Rtl Coding
• C
• Opnet
• Verilog
• Mems
• Cc Studio
• Unix
• Fpga
• Computer Network Operations
• Perl
• Asic
• Calibre
• Cmos
• Linux
• Modelsim
• Mac Os
• Cad
• Electronics
• Static Timing Analysis
• Java
• Cadence
• Quality Assurance
• Vhdl
• Analog Circuit Design
• Multisim
• Testing
• C++
• Floorplanning
• P Spice