Raghu Kumar Lakkam
Silicon Design Engineer 2 @ AMD | NIT Rourkela | Digital Design | Verilog HDL | Static Timing Analysis (STA) | AMBA Architecture | Python scripting
- Role
- Silicon Design Engineer 2 at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Raghu Kumar Lakkam
Innovative Silicon Design Engineer with a proven track record in the development and…
Experience
Silicon Design Engineer 2
Aug 2022 — Present · Hyderabad, IN
Responsible for scaling-up audio data-path to process multiple symbols per clock for supporting higher link rates up to 13.5 & 20 Gbps.• Implemented pixel processing data-path in TX/RX which maps individual pixels between DisplayPort links and video pixel interface supporting 4 or 8 pixels per clock according to IP configuration.• Scaled up the bridge IP meant for “AXI4 stream to Native video” conversion and vice versa to support 8 pixels per clock.• Performed CDC and linting checks on DisplayPort IPs as part of ensuring IP quality. This DisplayPort IP is part of organization’s IP portfolio which enables customers to seamlessly create multimedia solutions which find their applications in automotives, ultra-high resolution displays, high-bandwidth audio/video transmissions, Virtual Reality(VR) headsets etc.
Education
National Institute of Technology Rourkela
Master's degree
2020 — 2022
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