Raghav Kalayanasundaram Subramanian
CPU Physical Design CAD at Qualcomm
- Role
- Cpu Physical Design Cad Staff Engineer at Qualcomm
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Raghav Kalayanasundaram Subramanian
As a seasoned VLSI engineer with 6+ years of experience, my expertise spans the full spectrum of front-end and back-end VLSI processes. I contributed to tapeouts at industry leaders like NVIDIA and Qualcomm, using my expertise in Design for Test (DFT), Physical Design (PD), and Timing Signoff.Beyond executing designs, I developed internal tools for design analysis, deployed machine learning (ML) models, and led design automation initiatives to optimize VLSI flows, improve PPA and reduce non-recurring engineering (NRE) costs. My experience in methodology and R&D roles includes applying AI to engineering challenges and translating ML concepts into practical, industry-ready solutions.My career focus is on pushing the boundaries of chip design by leveraging my deep VLSI expertise and employing a mix of data mining, software solutions, and artificial intelligence (AI) to improve PPA and streamline chip design processes.Skills- EDA & Hardware: Primetime, ICC2, TestKompress, DFT Compiler, Verdi, VCS, SV, UVM Software: TCL, Python, C++, Java, Web Tech (Javascript, React, HTML) Artificial Intelligence: Python, PyTorch, numpy, scipy, scikit-learn, pandas
Experience
Cpu Physical Design Cad Staff Engineer
Oct 2024 — Present · San Jose, CA, US
Education
UC San Diego Jacobs School of Engineering
Master of Science - MS, Computer Engineering
University of California, San Diego - Rady School of Management
Fellowship, Technology Management and Entrepreneurism
2019 — 2020
Remote Customer Service Jobs
Bachelor of Technology, Electronics and Communications Engineering
2012 — 2016
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