Raghavi Thallapalli

About Raghavi Thallapalli

Hi, my name is Venkata Raghavi *Graduate in Bachelor of Engineering, Electronics and Communication Engineering.(June 2023)*Good at Digital Electronics, Verilog, System Verilog, UVM *Intended to build a career in Electronics. I am seeking an opportunity to prove my skillsets in the area of Electronics field.*Hobbies- Beginner at ukulele, love to read books *Strengths- Detail-oriented, Problem solving, Logical thinking skills *GitHub- github.com/Raghavi9860As a Research Intern at ZF Group, I support product engineering activities related to Braking and Steering, gaining hands-on experience in MATLAB/Simulink and Model-Based Design. I apply my theoretical knowledge in a practical setting, enhancing my problem-solving skills and fostering a deeper understanding of the Model-Based Design process.I am also a Trainee at VLSI FOR ALL Pvt Limited, where I received comprehensive training in Digital Electronics, Verilog, System Verilog, and UVM, acquiring expertise in digital design and verification methodologies. I applied my knowledge through industry-related projects, staying abreast of the latest trends in the field. I am a recent 2023 graduate of Electronics and Communication Engineering at Osmania University, with a passion for Electronics and a strong academic record. I am seeking an opportunity to prove my skillsets in the area of Electronics and learn from the best in the industry.

Experience

1. Dft Engineer

   高通

   Dec 2025 — Present · Bengaluru, IN

Education

• Osmania University

  Bachelor's degree, Electronics and Communications Engineering