Radha A
senior STA Engineer \\nclinet -- silicon labs
- Role
- Sta Engineer at Silicon Labs
- Location
- Hyderabad, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Radha A
worked on block level and SOC level Timing closure on 22nm/7nm/5nm/3nm technologies - hands on experience at Intel | Renesas | Qualcomm -woked on pre sta/post sta for func and DFT modes -constraints validation using GCA -knowledge on fusion compiler, prime time, Tweaker
Experience
Sta Engineer
Nov 2024 — Present · Hyderabad, IN
Education
Sri Venkateswara College of engineering and technology
Master's degree, VLSI Design
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