Rabbani Mohammed
RTL Design and Verification Trainee at VLSI First || Digital Electronics || Verilog || System Verilog || UVM || Graduate(B-Tech) at SVIET, Nandamuru || ECE\' 23
- Role
- Vlsi Design and Verification Trainee at Vlsi First
- Location
- Hyderabad, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Vlsi Design and Verification Trainee
Nov 2023 — Present · Hyderabad, IN
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