Quang Phan
Design Verification Engineer @Apple
Munich, DE
EMAILS
MOBILE NUMBERS
+91 *********19
Signup · Get unlimited contacts
WORK HISTORY
Jun 2024 — Present
Design Verification Engineer @Apple
View department →
Munich, DE
EDUCATION
2018 — 2021
Tampere University
Bachelor of Science - BSc (Tech), Science and Engineering
N/A
Technical University of Munich
Master of Science - MS, Electronics and Communications Engineering
ABOUT QUANG PHAN
I am in my fourth semester of the Master of Communications Engineering at the Technical University of Munich. My specialization is Communications Electronics and my main interests are IP Design & Verification and related fields.Keywords: SoC, FPGA, RTL design, SystemVerilog, UVM, DFT DV, Hardware Engineering, IP Verification
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.