Purushothaman Palani
Design Verification
- Role
- Design Verification Engineer at NVIDIA
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
About Purushothaman Palani
As a CPU Verification Engineer at InCore Semiconductors, I contributed to the functional verification of RISC-V CPU core modules, using my expertise in RISC-V and Python. I developed a python framework to generate automated instructions to test the functional correctness of micro-architectural elements, which improved the verification efficiency and coverage.I am currently pursuing my Master of Science degree in Computer Engineering at Virginia Tech, where I am researching the applicability of DRAM based Physically Unclonable Functions (PUFs) as a proof of authenticity under the supervision of Dr. Wenjie Xiong. I am also a Graduate Teaching Assistant for the courses Introduction to ECE and Fundamentals of Digital Systems, where I organize online lab sessions, help undergrad seniors with coursework, and grade assignments.My goal is to leverage my skills and experience in design and verification, as well as my passion for electronics and innovation, to find full-time opportunities in the semiconductor industry. I am proficient in Intel Quartus Prime, Xilinx Vivado. I am eager to learn new technologies and tools, and to collaborate with diverse and talented teams.
Experience
Design Verification Engineer
Jun 2024 — Present · Santa Clara, CA, US
Education
Virginia Tech
Master of Science - MS, Computer Engineering
National Institute of Technology, Tiruchirappalli
Bachelor of Technology, Electrical, Electronics and Communications Engineering
2017 — 2021
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