Sudeep P S

About Sudeep P S

10+ years of Industrial Experience in Semiconductor/EDA. 5 Years as RTL Design Engineer for FPGAs and over 5 years as Field Application Engineer. Worked with clients/peers across geographical regions like US, Europe and China. • Core- Technical Skills:Working knowledge of Complete FPGA design cycle starting from requirements capture, RTL development up to on-board validation SoC based embedded systems designs using Microsemi SoC FPGAs – SmartFusion2 and SmartFusion. Hardware Description Languages-VHDL and Verilog Hardware Verification Languages - SystemVerilog and PSL. Developing embedded applications using C language for ARM Cortex M3 processor. FPGA based design timing closure, Static timing analysis, and area optimization for FPGA designs. Hardware-software based design partitioning. ARM Cortex M3 based processor sub-system. AMBA busses – AXI, AHB and APB. DDR and SERDES based system designs. On-board communication interfaces like SPI, UART, I2C. On-board debugging equipment-Oscilloscope and Logic Analyzer Developing IP, design and silicon user-guide documents.Worked on following EDA software Microsemi Libero IDE Xilinx ISE IDE Functional Verification and Code Coverage tools-Modelsim and Questa. Synthesis tools-Mentor’s Precision Synthesis and Synopsys Synplify Pro. On-chip verification tools-Synopsys Identify and Temento Systems DiatemHad provided technical support for leading EDA software- ModelSim, Questa, and Precision Synthesis from MentorGraphics, VN-Check and VN-Cover from TransEDA, PCB based hardware debugging products from TementoSystems FPGA design partitioning product for ASIC Prototyping from AuspyHad worked on TCL scripting for automation EDA tools.

Experience

1. Sr Ae Manager

   Synopsys Inc

   Jan 2024 — Present · Bangalore Urban, IN

Education

• Visvesvaraya Technological University

  Bachelor Of Engineering, Electronics & Communication Engineering

  2000 — 2004

• Manipal Academy of Higher Education

  Master of Science(MS), VLSI-CAD

  2007 — 2009

• Holy Cross School, Bokaro

  Class Tenth

  1997 — 1998

• Delhi Public School - Bokaro

  High School, Physics, Mathematics, Chemistry, English, Accountancy and Hindi

  1998 — 2000

Skills

• Vlsi
• Xilinx
• Systemverilog
• Modelsim
• Functional Verification
• Fpga
• Tcl
• Debugging
• Simulations
• Ddr
• Verilog
• Eda
• Rtl Design
• Soc
• Static Timing Analysis
• Hardware Architecture