Pawandeep Sawhney
Member of Technical Staff at Etched
- Role
- Design Verification Engineer at Etched
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Design Verification Engineer
Aug 2024 — Present · Cupertino, CA, US
Education
Netaji Subhas Institute of Technology
Bachelor's Degree, Electrical, Electronics and Communications Engineering
North Carolina State University
Master's Degree, Computer Engineering
Skills
- Soc
- Autocad
- Compilers
- Ni Labview
- Arduino
- Eagle Pcb
- Iar Embedded Workbench
- Digital Signal Processing
- Altera Quartus
- P Spice
- Openmp
- C++
- Shell Scripting
- Cadence Encounter
- Asic
- Xilinx
- Systemverilog
- Cadence Schematic Capture
- Linux
- Synopsys Design Compiler
- Cadence Virtuoso Layout Editor
- Synopsys Tools
- Microcontrollers
- Electronics
- Engineering
- Microprocessors
- Vhdl
- Simulations
- Arm Ds-5
- Arm Cortex-M
- Verilog
- Cuda
- Primavera P6
- Pcb Design
- Matlab
- S
- Llvm
- C
- Perl
- Embedded Systems
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