Pruthwish Patel

Silicon Design Engineer at Google | Ex-Qualcomm | Ex-Samsung

Role
Silicon Design Engineer at Google
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Pruthwish Patel

I am a perseverant individual with a vision to make world a better place. My friends and colleagues describe me as a mentor, trusted advisor and a model performer. I am always looking to add a net positive impact to my social and professional eco system. Action bias, immersive diligence, and data-driven critical inquiry are corner stones of my work ethos and help me follow through the end of the task and beyond.

Experience

  1. Silicon Design Engineer

    Google

    May 2022 — Present

    1) Responsible for 3 successful tapeout of DSP cores for flagship Google SoC, used in Google Pixel devices. 2) Drive and mentor engineers with a process driven approach to get the best PPA. We started with 20% higher then the power target, we were some of the few subsystems to beat dynamic power target by 19%.3) Drive and push vendors such as Cadence to get the best PPA. a) All features were thoroughly examined and taken to Cadence RnD for pushing the power limits. b) Drive new flow examinations such as Cerebrus, XoR, Xtensa( IP specific suggestions), XReplay for pushing power limits.4) Get process checks in place right from the start of the project cycle, to beat schedule with minimum number of ECO\'s. 5) Comprehensive understanding and implementation of JSR and Vmin flows to enhance quality of silicon. 6) Drive and plan area reduction experiments, to come up with best feasible floorplan, conducive to area savings and SoC team within a very short span of time, keeping schedule intact. 7) Received 4 spot awards in the form of appreciation of the results delivered and processes followed for PPA push and execution during the span of last 1 year.

Education

  • Gujarat Technological University (GTU)

    Bachelor’s Degree, Electronics and Communication Engineering

    2009 — 2013

  • Indian Institute of Technology, Madras

    Integrated Circuits and Systems

Skills

  • Perl
  • Linux
  • C
  • Industrial Automation
  • Awk
  • Design Rule Checking (Drc)
  • Static Timing Analysis
  • Pnr
  • Physical Verification
  • Vlsi
  • C++
  • Relationship Building
  • Business Development
  • Physical Design
  • Plc Programming
  • Scada
  • Tcl
  • Analog Circuit Design

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Pruthwish Patel — Silicon Design Engineer at Google in Bengaluru, KA, IN | Unifers