Priyadarshini M
Design Verification Engineer
- Role
- Design Verification Engineer at Tech Mahindra Cerium Pvt Ltd
- Location
- Coimbatore, TN, IN
- LinkedIn followers
- 500 followers
About Priyadarshini M
Worked on Pcie Gen5 to verify the Dut with 2.8years experience-Handled several blocks of Pcie 5.0-Knowledge in Test Plan,V- Plan creation,Test Case coding, Debugging-Worked on code coverage and functional coverage-Good hands on Experience in EDA tools like Cadence simvision and Vmanager.Skills:VLSI HVL VerificationSystem verilogSoC Verification
Experience
Design Verification Engineer
Nov 2024 — Present · Kochi, IN
Education
Karpagam College of Engineering
Bachelor of Engineering - BE
2017 — 2021
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