Prema Cl
Experienced RTL Design and Integration Engineer Available for Immediate Joining
- Role
- Technical Lead at HCLTech
- Location
- Beaverton, OR, US
- LinkedIn followers
- 500 followers
About Prema Cl
I have successfully completed Lint, CDC, and RDC across numerous projects, emphasizing the critical role of clock domain crossing in chip design. With disparate sections of the design operating on signals with varying clock frequencies, ensuring precise synchronization and management is essential to mitigate timing issues and maintain functional reliability and have a knowledge on dft techniques such as Bist and also have an experience on Physical design flow.
Experience
Technical Lead
Jul 2024 — Present · Portland, OR, US
Education
Dr. Ambedkar Institute Of Technology
Bachelor of Engineering, Instrumentation Technology; Electronics and Communicaton
VTU Extension centre Utl technologies ltd
Mtech, Digital Electronics
2014 — 2016
Skills
- Rtl Coding
- Verilog
- Physical Design
- Testing
- Tpe
- Application-Specific Integrated Circuits (Asic)
- Rtos
- Very-Large-Scale Integration (Vlsi)
- Microsoft Excel
- Logic Bist
- Ate Based Tpe
- Rtl Design
- Automatic Test Pattern Generation (Atpg)
- C
- Linux
- Dft
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.