Praveen Merwade

About Praveen Merwade

Experience of more than 15 years in ASIC Verification. I have strong knowledge on SoC and IP verification using latest verification methodologies and tools. Experience in building technically strong verification teams for many clients and different projects from SoC to IP Level.Currently I am Leading team working on UCIe chiplet Phy verification. My team is verifying UCIe design with in-house UVCs. I also have strong background of Service Startup business as a Co-Founder. I learned building teams, networking and successful execution ownership projects both in ODC and client location.Specialties: Managerial Skills:• Engineering team management• Project management• Project Planning and estimation Technical Skills:• SoC and IP Verification• Good knowledge on layered protocols like USB and UCIe• Strong knowledge on System Verilog and UVM• Experience in Python based Testbench COCOTB• Good Scripting knowledge.

Experience

1. Principal Engineer

   Marvell Technology

   Jan 2025 — Present · Bengaluru, IN

   Working on HBM (High Bandwidth Memory DDR) and GIC (Generic Interrupt Controller)

Education

• Kolhapur Institute of Technologie's college of engineering, Kolhapur

  B.E., ELECTRONICS

  2006 — 2010

Skills

• Logic Design
• Vmm
• Rtl Coding
• Modelsim
• Debugging
• Soc
• Arm
• Vcs
• Semiconductors
• Hardware Design
• Functional Verification
• Rtl Design
• Ncsim
• Ahb
• Integrated Circuit Design
• Microprocessors
• Compilers
• Verilog
• Coverage
• Perl
• Eda
• Apb
• Processors
• Microcontrollers
• Usb
• Usb3.0
• Dsp
• Digital Design
• Electronics
• I2c
• Simulation
• Coverage Analysis
• Xilinx
• Systemverilog
• Amba Ahb
• Uvm
• Nc-Verilog
• Vhdl
• Simulations
• Open Verification Methodology