Praveen Khemalapure
- Role
- Soc Design Verification Engineer at Intel
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Praveen Khemalapure
Electrical Engineer with specialization in Digital Design and…
Experience
Soc Design Verification Engineer
Aug 2018 — Present
Education
Kle Cet College of Engineering & Technology
Bachelor's degree, Electrical, Electronics and Communications Engineering
2008 — 2012
San José State University
Master of Science (MS), Electrical Engineering
2016 — 2018
Skills
- Apache
- System on a Chip (Soc)
- Field-Programmable Gate Arrays (Fpga)
- Verilog
- Windows
- Liberate
- C
- Powerpoint
- Vcs
- Systemverilog
- Simulations
- Universal Verification Methodology (Uvm)
- Integrated Circuit Design
- Cmos
- Linux
- Tcl
- C++
- Characterization
- Ncverilog
- Design Compiler
- Html
- Microsoft Office
- Synopsys Tools
- Programming
- Python
- Embedded Systems
- Microsoft Excel
- Hspice
- Cadence Spectre
- Silicon Smart
- Liberate
- Modelsim
- Ddr3
- Logic Design
- System Verilog
- Application-Specific Integrated Circuits (Asic)
- Cadence
- Perl Scripting
- Altera Quartus
- Static Timing Analysis
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