Pratik Mote

About Pratik Mote

Expert in CPU Physical Design & Power DeliveryHello! I am an experienced Power Delivery Network (PDN) and EMIR Engineer with over 7 years of working on advanced semiconductor technologies. I specialize in low power design, electromigration, IR drop analysis, and reliability for CPU\'s.My core skills include Bump Planning, Full-chip and partition IR/RV Convergence, MIMCAP planning, CPM Modelling, and ensuring robust Power Delivery Network design. I have worked on cutting-edge nodes like 7nm, 5nm, 3nm, Intel 20A, and Intel 18A (Backside Power Delivery). If you\'re looking for a dedicated engineer to help advance your semiconductor projects, let’s connect and bring your ideas to life!

Experience

1. Cpu Physical Design Engineer Emir Pdn

   Intel

   May 2018 — Present · Bangalore, IN

   Full chip and Block level PDN analysis( EM/IR, Reliability Verification) and Signoff. Bump & RDL routes planning, MIMCAP Planning Secondary Power Grid planning Taped out outstanding SoC with most advanced process nodes in industry. Experience in coordinating small team for physical design activity along with cross domain teamcollaboration for design closure. Good knowledge and hands on experience in physical design implementation which includes Floorplan, Placement, Clock Tree synthesis and Routing. Experience VCLP/Spyglass convergence and solved critical UPF related issues.

Education

• Vellore Institute of Technology

  Master of Technology (M.Tech.), VLSI Design

  2016 — 2018

• Smt.Kashibai Navale college of Engineering

  Bachelor of Engineering (B.E.), Electronics and Communications Engineering

  2011 — 2015

Skills

• Asic
• Research
• Electomigration
• Qca
• Training
• Leadership
• Perl
• Verilog
• Strategic Communications
• Low-Power Design
• Application-Specific Integrated Circuits (Asic)
• Physical Verification
• Ir Analysis
• Management
• Sales
• Vlsi
• Tcl