Pratibha Nandi
Layout Design Engineer at Intel Corporation
- Role
- Layout Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
Experience
Layout Design Engineer
Aug 2020 — Present
4+ years of Industry experience as Analog Layout Engineer in Intel Technologies Pvt Ltd.• Good hands-on knowledge on Custom layouts design and Physical Verification tools.• Expertise in FinFET Process (Intel 18A, TSMC 3nm, TSMC 5nm and Intel 7nm)• Ability to quickly interpret and fix complicated LVS/DRC issues using state of art verificationtools such as Synopsys ICV, Mentor Graphics Calibre, Totem for EM & IR Analysis.• Good understanding of CMOS concept, matching, shielding, differential routing.• Experience is handling ECO changes, antenna, latch-up rules, HV violations, reliabilityverification.• Basic understanding of skill scripting to support the design automation requirements.
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