Pratheep Bondalapati

WORK HISTORY

EDUCATION

ABOUT PRATHEEP BONDALAPATI

INDUSTRIAL EXPERIENCE:Facebook Connectivity lab, California: Currently working on developing a baseband simulation model for a Millimeter-wave wireless communication channel. Involved in testing/calibration of analog baseband and RF circuits for the same application. Qualcomm: Summer 2014, Corporate R&D engineering intern at Qualcomm Flarion Technologies, New Jersey.1. Research and planning on waveforms and algorithms expected to be used in 5G technology. Simulation of Generalized Frequency Division Multiplexing (GFDM) technique to evaluate the performance.2. MIPs estimation for Small-cells receiver baseband processing. The estimation was done based on Qualcomm’s existing state-of-the-art receiver architecture.3. Devised the architectural design for a Reed-Muller decoder in LTE-U uplink receiver. The decoder was specifically designed for decoding CQI in PUSCH and PUCCH for all the formats (2, 2a and 2b).ACADEMIC WORK (for Ph.D. Thesis)An all-Digital Phase Locked Loop (DPLL), involving a Digitally Controlled Oscillator (DCO) operating at 1GHz with a real-time feedback, is implemented and studied in a testing environment. The work done on this topic required expertise in the following aspects:1. PCB design for implementing the biasing circuit, SMA input/output probes for the DCO chip (using Cadence tools)2. AWR Microwave office simulations to verify impedance matching in order to route the 1GHz carrier signal from the DCO output.3. Additional Couplers and Bias Tee design for testing the system in noisy environments (Supply noise coupling).4. Using spectrum analyzers, RF signal generators and 12GHz Agilent oscilloscopes to capture and analyze the DCO output waveforms and the spurious tones power level.