Prathamesh Bhangale

CPU Arch DV Intern, Qualcomm - NUVIA | Actively Seeking Fall 2025/ Spring 2026 Co-op Opportunities in Hardware Design, Verification and Computer Architecture | MS Computer Engineering, NCSU

Role
Cpu Architecture Design Verification Intern at 美商高通國際股份有限公司
Location
Austin, TX, US
LinkedIn followers
500 followers

About Prathamesh Bhangale

I am currently pursuing master\'s in computer engineering at North Carolina State University, with specialization in computer architecture and VLSI systems. Interested in computer hardware development and digital design verification, currently looking for internship/Co-op opportunities in Fall 2025/Spring 2026. Skills : Verilog, SystemVerilog, C++, Python, Shell scripting, STA, Clock Domain Crossing, RTL Design, Bash, Linux, Signal Processing. Tools : Synopsys Design Compiler, OpenMP, MATLAB, Altium Designer, Proteus, Eagle PCB, ModelSim Computer Architecture : Virtual Memory, Cache, Cache Coherence, Out of Order Processor(OOP), Pipeline, Branch Prediction, Memory Management Unit Protocols : SPI, I2C

Experience

  1. Cpu Architecture Design Verification Intern

    美商高通國際股份有限公司

    May 2025 — Present · Austin, TX, US

Education

  • COEP Technological University

    Minors, Computer Science

  • COEP Technological University

    Bachelor of Technology - BTech, Electrical Engineering

    2019 — 2023

  • North Carolina State University

    Master's, Computer Engineering

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Prathamesh Bhangale — Cpu Architecture Design Verification Intern at 美商高通國際股份有限公司 in Austin, TX, US | Unifers