Prashanth Kumar
Senior Verification Engineer_looking for Job change _Immediate Joiner
- Role
- Senior Design Verification Engineer at Scaledge Technology
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Prashanth Kumar
I have worked as Assistant Professor at GRIET, Hyderabad from Feb2016- Sept 2019.Now I\'m working in Incise Infotech private Ltd, Bangalore since dec 2020-> I know the concepts of different modeling techniques in Verilog-> I can Understand the Systemverilog concepts like Object Oriented Programming, Constraint Randomization, Assertion based Verification, Functional Coverage etc-> I Have a Good knowledge in verification Methodology like UVM-> Good Understanding the concepts of SoC Level Verification-> I have a Experience in writing test benches in Systemverilog and methodology UVM-> Understanding the UVM concepts like sequence-sequencer-driver communication,Phases and TLM-> I am Familiar with UNIX environment and Scripting Languages like Perl and Python-> Basic knowledge in Computer Architecture-Experience on emulation test plan preparation & launching on ZEBU Emulator
Experience
Senior Design Verification Engineer
Dec 2024 — Present
Axi-sddr5/lpddr5
Education
Jawaharlal Nehru Technological University
Master of Technology - MTech, VLSI
2013 — 2015
RRS College of Engineering Technology
Bachelor of Technology - BTech, Electronics and Communications Engineering
2008 — 2012
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