Prashant Chourey

About Prashant Chourey

Currently working as Technical Manager (Staff Applications Engineer) at Synopsys, Bangalore. • Having 10+ yrs of experience in Physical Design.• Worked on Physical design activities from RTL to GDSII.• Hands on experience in tools like Fusion Compiler, IC Compiler, ICC2, Design Compiler, Prime Time, and ICV.Specilities: PnR at Block and Top Level: Floorplan, Powerplan, Placement, CTS, Routing, STA, DFM, Timing and SI Signoff Closure, Logic Equivalence Check, IR & EM Analysis, Physical Verification, & TCL/Perl Scripting.Completed M.Tech.(2012) in VLSI Design from Visvesvaraya National Institute of Technology, Nagpur.

Experience

1. Senior Member of Engineering Staff

   新思科技股份有限公司

   Feb 2013 — Present

   I work with customers in the field of Physical Design and solve complex technical challenges in the area of high frequency designs, deep sub-micron technology, low power, and signal integrity.We as a team brings tangible and lasting improvements in performance, cost, quality, and development time for ASICs.

Education

• Visvesvaraya National Institute of Technology

  M TECH, VLSI DESIGN

  2010 — 2012

• Rajiv Gandhi Prodyogiki Vishwavidyalaya

  BE, Electrical, Electronics and Communications Engineering

Skills

• Modelsim
• Verilog
• Vhdl
• Vlsi
• Rtl Coding
• Xilinx Ise
• Rtl Design
• Cmos
• Cadence Virtuoso
• Analog Circuit Design
• Physical Design
• Asic
• Icc
• Integrated Circuit Design
• Tcl
• Perl
• Xilinx
• Fpga
• Eda
• Static Timing Analysis
• Application-Specific Integrated Circuits (Asic)