Prasanna Swaminathan
Senior Principal at Astera Labs
- Role
- Senior Principal Engineer at Astera Labs
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
About Prasanna Swaminathan
20 years of technical experience in handling multiple Tier-1 networking and consumer electronics customers- Extensive knowledge of 1G copper and 10G/40G/50G/100G EDC Ethernet Physical layer applications- Currently working on 56G PAM-4 SERDES applications and implementation- In-depth knowledge of hardware components of Ethernet, HDMI, Displayport and DVI- Familiar with the design and implementation of 1.25Gbps and 10G EDC SERDES- Characterized PHY features such as Energy Efficient Ethernet, MACsec, Sync-E and PTP- System level understanding of network implementations- Global support experience having dealt with customers from China, Europe, India, USA and Japan.
Experience
Senior Principal Engineer
Jan 2024 — Present · Santa Clara, CA, US
Working PCIe Gen 5 and Gen 6 Retimer products- Serdes validation and evaluation
Education
Utah State University
MSEE, Electrical Engineering
University of Madras
Bachelor of Engineering, Electrical Engineering
Skills
- Debugging
- Signal Integrity
- Ic
- High Speed Board Design
- Mixed Signal
- Firmware
- Embedded Systems
- Semiconductors
- Soc
- Analog
- Characterization
- Serdes
- 1g and 10g Ethernet Phy Features Characterization and Design Familiarity
- Testing
- System Interfaces Expertise- Sfi/Xfi/Rxaui/Xaui/Qsgmii/Sgmii
- Hdmi
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