Prasanna Ramesh
Principal Design Engineer at Cadence Design Systems
- Role
- Sr Principal Design Engineer (Analog Design) at Cadence
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Sr Principal Design Engineer (Analog Design)
Jul 2025 — Present
Education
College of Engineering, Guindy
Bachelor of Engineering (B.E.), Electronics and Communication Engineering
2006 — 2010
Indian Institute of Science (IISc)
Master of Engineering, Microelectronic systems
2010 — 2012
Skills
- Very-Large-Scale Integration (Vlsi)
- Cmos
- Digital Signal Processing
- Analog Circuit Design
- Application-Specific Integrated Circuits (Asic)
- Semiconductors
- Verilog
- Debugging
- Asic
- Pll
- C
- Ic
- Matlab
- Analog
- C++
- Mixed Signal
- Mixed-Signal Ic Design
- Vhdl
- Soc
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