Durga Prasad Podagatla
MTS Silicon Design Engineer
- Role
- Mts Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Durga Prasad Podagatla
8 years of experience in ASIC Design and Verification.* Worked on 10+ SoC\'s for Automotive and General purpose applications.* Currently working as Verification lead of Mixed Signal Processors famously known as MSP430.* Specialized in SoC verification using C and System Verilog * Sound knowledge on Formal Property Verification, Connectivity Verification using Jasper Gold tool.* Verification environment planning and VIP development using SV/UVM.* Knowledge on PERL and Python scripting.* Gate level simulations* Worked on NVM(Flash Memory) Verification.* Clocking and Reset designs and verification methodologies.* Lint, Clock and Reset domain crossing analysis.* Worked on AXI, AHB, APB protocols #Specialized in : SoC Verification, Formal Verification, Power, Clock and Reset Designs.
Experience
Mts Silicon Design Engineer
Feb 2026 — Present · Hyderabad, IN
Education
Z.P High School Vempadu
SSC
2009 — 2012
RAJIV GANDHI UNIVERSITY OF KNOWLEDGE TECHNOLOGIES, NUZVID
Intermediate + Bachelor of Technology, Electronics and Communications Engineering
2012 — 2018
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