Pranshu Chandra Mishra
IC design Engineer (Analog Layout )
- Role
- Senior Engineer at Qualcomm
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Pranshu Chandra Mishra
Totally 3+ years experience as Analog, Mixed Signal IC layout engineer. With extensive experience in Ribbon fet, Finfet, CMOS technologies.Extensive experience in performing full custom Finfet/CMOS layout from transistor level to top level.Experienced and knowledgeable in using advanced very deep sub-micron technology nodes such as 28nm CMOS, and 16FF, 14FF, 7FF Finfet and 18A Ribbonfet TSMC/INTEL.Excellent technical skills and deep understanding of layout design issues and how to mitigate them such as the following-Electro-migration- Latch-up-Antenna Effect-Electro-Static Discharge (ESD)-Cross-talk-Parasitics-Well Proximity Effect-DFM issues and othersExpertise:Layout/Design Tools:Cadence Virtuoso XL,MXLCadence Virtuoso Layout Editor/Open AccessCadence Virtuoso Schematic Composer. Verification Tools:Calibre LVS, DRC (Mentor Graphics)Solid Crosscheck(Siemens)*(Verification DRC, LVS, ERC, RC Extraction, Antenna, DFM, EM and ESD check)Others: Linux,MS office (Excel, Powerpoint, Word)Specialties:Full custom CMOS layout design of Analog and Mixed-Signal integrated circuits.DC-DC(power) chip, SERDES,DAC, 10 Buffers,and test chips.
Experience
Senior Engineer
Feb 2026 — Present · Bengaluru, IN
Education
Maulana Abul Kalam Azad University of Technology, West Bengal formerly WBUT
Bachelor of Technology - B.Tech, Electrical Engineering
2017 — 2021
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