Pranjal Gupta
Senior Design Verification Engineer @ Google | Ex-Samsung | Ex-Cadence
- Role
- Senior Design Verification Engineer at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Pranjal Gupta
Senior Design Verification Engineer at Google. Currently working on IP/Subsystem level design verification of Silicon Multimedia and Security IPs.• Experience in IP level/Top level SoC Verification using Advanced Verification Methodologies(SV/UVM)• Experience of building Configurable Verification Environment and Components.• Good understanding of SystemVerilog OOPs concepts.• Experience in writing Assertions and Functional Coverage for Constrained Random Verification.• Experience in Analog Behavioral Modeling and Mixed signal Co-simulations.• Experience in analyzing top level SOC schematic, extracting netlist and running full chip DMS simulations.• Experience in Real Number Modelling and Model Validation against transistor level schematic.• Hands-on experience using DV simulation tools, Waveform and schematic tools.
Experience
Senior Design Verification Engineer
Oct 2024 — Present · Bengaluru, IN
Education
KRISHNA INSTITUTE OF ENGINEERING AND TECHNOLOGY, GHAZIABAD
Bachelor of Technology - BTech, Electronics and Communication Engineering
2015 — 2019
Lions School Mirzapur (CBSE)
Intermediate, Science
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