Pranay Tiwari

About Pranay Tiwari

I\'m currently working in the Synopsys SerDes group with a primary focus on Analog Static Timing Analysis (Analog STA) for high speed mixed signal IPs.Prior to this, I was part of the SoC team at Broadcom, where I worked on a 3nm technology node as a STA Engineer. My responsibilities included performing timing analysis using PrimeTime,DMSA and Tweaker, as well as conducting FSDB based power analysis.I started my career as a Physical Design Intern, gaining hands-on experience in 14nm technology nodes.My work involved various aspects of the implementation flow, including floorplanning, placement,CTS and timing/DRV closure.I am a focused individual who is passionate about learning and staying up to date with the latest developments in the industry.

Experience

1. Senior Analog Design Engineer

   新思科技股份有限公司

   Dec 2024 — Present · Noida, IN

Education

• Harcourt Butler Technical University

  Master of Technology - MTech

• Jaypee University of Engineering and Technology

  Electronics and communication engineering

  2013 — 2017