Pranavi Bheemreddy
ASIC Design Engineer | UC San Diego | Ex-Intern at TI | BITS Pilani
- Role
- Asic Design Engineer at Wilo Networks
- Location
- Lexington, KY, US
- LinkedIn followers
- 500 followers
About Pranavi Bheemreddy
Driven ASIC Design Engineer with ~2 years of experience in RTL design and verification…
Experience
Asic Design Engineer
Jun 2024 — Present · San Francisco, CA, US
Implementation of digital controllers in Verilog/SystemVerilog for a low-power ASIC targeting industrial warehouse applications, with synthesis in Genus, functional verification in Vivado, and gate-level plus mixed-signal simulations in Virtuoso
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