Pranathi Gopagani
Aspiring VLSI Engineer | RTL Design & Verification | SystemVerilog, UVM & ASIC/FPGA Enthusiast | DRDO Intern | Passionate About Cutting-Edge Semiconductor Technologies
- Role
- Trainee at Maven Silicon
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
About Pranathi Gopagani
As an aspiring VLSI engineer, I bring hands-on experience in RTL design and verification methodologies. I have a keen passion for tackling challenging problems and contributing to groundbreaking semiconductor projects. My expertise spans HDL and HVL programming, using tools like SystemVerilog and UVM to create and verify ASIC/FPGA systems. During my time at DRDO, I gained invaluable experience working on embedded software, successfully developing and simulating complex block diagrams. I thrive in environments where I can blend creativity with technical precision to innovate solutions. My journey through professional training at Maven Silicon, combined with my academic background in Electronics and Communication, has given me a solid foundation in design and verification. I’m proficient with industry-standard tools like QuestaSim, Synopsys VCS, and Xilinx ISE—skills that help bridge theoretical concepts with practical applications in the semiconductor industry. If you\'re interested in discussing opportunities, collaborating on projects, or simply exchanging ideas about VLSI and semiconductor innovation, I’d love to connect!
Experience
Trainee
Jan 2024 — Present · Bengaluru, IN
Education
Keshav Memorial Institute of Technology
Bachelor of Technology - BTech
2019 — 2023
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