Prakash Guwalani
Principal Engineer at Intel Corporation
- Role
- Principal Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Prakash Guwalani
18+ Years of Physical Design Experience in ASIC and Product companies - Worked on…
Experience
Principal Engineer
Feb 2024 — Present · Bangalore Urban, IN
Education
Indian Institute of Technology, Bombay
Microelectronics, VLSI
2003 — 2005
Skills
- Tcl
- Physical Design
- Asic
- Debugging
- Integrated Circuit Design
- Static Timing Analysis
- Application-Specific Integrated Circuits (Asic)
- Very-Large-Scale Integration (Vlsi)
- Vlsi
- Clock Tree Synthesis
- Soc
- Semiconductors
- Processors
- Formal Verification
- Cmos
- Timing Closure
- Logic Design
- Perl
- Eda
- Ic
- Floorplanning
- Place & Route
- Dft
- System on a Chip (Soc)
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.