Raja Reddy P

About Raja Reddy P

Senior design engineer with 9+ years of experience in design of high performance CMOS Image Sensors, TOF Depth Sensors and Aanalog to Digital converters.Strong background in the design of high performance low power pipeline ADCs, CMOS image sensors and TOF Depth Sensors, wherein designed high performance analog blocks like low noise analog front ends, continuous time and switched capacitor circuits, high speed analog multiplexers, A to D converters.Good understanding of various pixel architectures. Strong silicon debug capabilities, profound knowledge of image artifacts and full chip noise estimation techniques in CMOS image sensorsGood experience of custom layout and layout automation using SKILL scripting and Pcells.Excellent verbal communication and documentation skillsSpecialties: Analog & Mixed Signal and system level Design, Specification to architecture definition and silicon, Strong device physics background, Full Chip Noise Estimation, silicon debug, profound knowledge of image artifacts in CMOS image sensors, rad-hard design, Layout automation, Excellent documentation skills

Experience

1. Senior Design Engineer

   Texas Instruments

   Mar 2011 — Present · Bangalore, IN

   Time of Flight Depth Image Sensors, Low power Analog to Digital Converters

Education

• Osmania University

  B.E., Electronics and Communication Engineering

  2001 — 2005

• Indian Institute of Science (IISc)

  ME, Microelectronics

  2005 — 2007

Skills

• Sram
• Cadence Virtuoso
• Cmos
• Integrated Circuits (Ic)
• Analog Circuit Design
• Ic
• Fpga
• Asic
• Vlsi
• Verilog
• Rtl Design
• Semiconductors
• Integrated Circuit Design
• Systemverilog
• Silicon Debug
• Device Physics
• Debugging
• Physics
• Eda
• Silicon
• Sensors
• Soc
• Mixed Signal
• Low-Power Design
• Vhdl
• Simulations
• Analog