Prafull Bhalerao
Design Verification / Low Power Lead
- Role
- Low Power Design Verification Lead at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
Experience
Low Power Design Verification Lead
Jan 2023 — Present · Bengaluru, IN
Education
Shri G.S. Institute of Tech. & Science Indore
BE
1998 — 2002
Bal Vinay Mandir
SSc
1986 — 1997
Indian Institute of Technology, Kharagpur
Master of Technology (M.Tech.)
2003 — 2005
Skills
- Functional Verification
- Debugging
- Systemverilog
- System on a Chip (Soc)
- Asic
- Formal Verification
- Soc
- Verilog
- Timing Closure
- Low-Power Design
- Low Power Systems
- Vlsi
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