Pradeep Hanumansetty

About Pradeep Hanumansetty

22+ years of experience in ASIC SOC end to end verification work which includes extensive hands on AMD Server SoC architecture and its products which includes the Epyc series. Also, responsible for verifying the power management and power architecture of these products. Worked on multiple x86 and ARM based designs including hands on experience in protocols like AMBA AHB, AXI, PCIE, SATA, USB.ASIC SOC/module/IP level verification using advanced test benches built on object oriented techniques leveraging the power of constrained random stimulus & coverage driven metricsExperienced in building test bench components using different methodologies like UVM, OVM, VMM (System Verilog) & eRM (Specman-E).Experienced in creating test plan containing the strategies of test bench architecture and identifying all the possible corner cases/scenarios/coverage groups with reference to the specificationsExperienced in creating coverage plans specific to a design, generating functional and code coverage reports & analyzing themExperienced in setting up the gate level simulation platform & debugging themDecent experience of debugging FPGA emulation related activities which includes understanding the problem, duplicating it in simulations & finding the root causePost Silicon debug, support & testing

Experience

1. Fellow

   AMD

   Jun 2024 — Present · Hyderabad, IN

Education

• GITAM Deemed University

  B.E., Electronics and Communications

  2000 — 2004

Skills

• Asic
• Systemverilog