Pooja S
Senior Design Engineer @Intel
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WORK HISTORY
Senior Design Engineer @Intel
Bengaluru, IN
EDUCATION
B V B College of Engg. & Technology, HUBLI
Bachelor of Engineering - BE, Electrical and Electronics Engineering
ABOUT POOJA S
Currently looking for job in memory design domain. I have 4+ years of experience in Memory Design & Characterisation. Worked as a Senior Design Engineer. My field of work:*Performed Timing analysis, Post layout simulation.*Worked on DRC & LVS,floor planning,Placement/Routing.*Tools :Cadence Vituoso, Eden,Spectre,Ltspice and Simvision.*Scripting knowledge of Python,TCL and Perl (basics)*Good knowledge on digital and memory circuit design.*Also mentored junior engineers and reviewed their work. Achievements:~>Received “Cheers for Peers” Award for developing CDL flow for functional verification ~ NXP Semiconductors.
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