Pooja Ramesh
Staff Design Engineer @Sandisk
Glasgow, GB
EMAILS
MOBILE NUMBERS
+91 *********19
Signup · Get unlimited contacts
WORK HISTORY
Aug 2024 — Present
Staff Design Engineer @Sandisk
View department →
Bengaluru, IN
I am part of Validation and Host System where we build FPGA to test NAND devices.I work with Versal FPGA, NOC, Ethernet, UFS, DDR
EDUCATION
N/A
University of Glasgow
Master of Science, Electrical and Electronics Engineering
2003 — 2010
Iyer High School
10th Class
2012 — 2016
University Vishweshwaraya College of Engineering
B.E, ECE
2010 — 2012
MLA PU College
PCMB
ABOUT POOJA RAMESH
Greetings! I am an experienced Staff Design Engineer passionate about creating innovative…
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.