Piyush Desai

RF System Design | Analog and High-Speed Digital Hardware Design | WiFi / BlueTooth Communication

Role
Wireless System Hardware Design Engineer at 恩智浦半导体
Location
Pune, MH, IN
LinkedIn followers
500 followers

About Piyush Desai

Experienced in RF system design, Analog & High-Speed Digital hardware design and…

Experience

  1. Wireless System Hardware Design Engineer

    恩智浦半导体

    Dec 2019 — Present · Pune, IN

    Hardware reference designs for Wireless connectivity chip-sets * Prepared hardware reference designs with different form factors for WiFi/BT/802.15.4 Wireless chip-sets supporting 802.11 a/b/g/n/ac/ax modulations, 2.4GHz/5GHz/6GHz frequency bands, SISO / MIMO (Up to 8x8) configurations and PCIe/USB/SDIO/UART/SPI host interfaces. Characterization and Optimization of Physical Layer Performance of Wireless Connectivity Chip-sets Wireless hardware system design including Quad ARM Cortex A72 cores processor, PCIe Gen3 interface, 1Gbps Ethernet interface, 10gbps SERDES interface, SDIO 2.0 / 3.0 interfaces, switching regulators, SPI interface, UART interface, RF Front Ends supporting WiFi frequency bands 2.4GHz and 5GHz.

Education

  • Birla Vishvakarma Mahavidyalaya

    B.E.

    1996 — 2000

  • Indian Institute of Technology, Bombay

    M.Tech.

    2001 — 2004

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Piyush Desai — Wireless System Hardware Design Engineer at 恩智浦半导体 in Pune, MH, IN | Unifers