Philip Fernandez
- Role
- Altera
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
About Philip Fernandez
Over 30 years’ experience in FPGA/ASIC design tools and methodologies including HDL…
Experience
Present
Education
Caltech
Bachelor's degree, Electrical and Electronics Engineering
1986 — 2000
Skills
- Quartus
- Cpld
- Hardware Architecture
- Modelsim
- Place & Route
- Verilog
- Debugging
- Serdes
- Altera
- Vhdl
- Simulations
- Altera Quartus
- Eda
- Static Timing Analysis
- Digital Electronics
- Tcl
- Semiconductors
- Soc
- Rtl Design
- Fpga
- Asic
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.