Pavana B N
Post graduation(VLSI) | VLSI Physical design Enthusiast | Pursuing expertise in chip design and optimization
- Role
- Intern at Rj Semiconductor
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
Research & DevelopmentView LinkedIn profile
About Pavana B N
I am a highly motivated and detailed oriented VLSI physical design engineer Seeking a…
Experience
Intern
Oct 2025 — Present · Bengaluru, IN
Education
Mandavya excellence PU college
Mandya, india
Mandavya excellence English medium high school mandya
School
SJB Institute of Technology
Bachelor of Engineering - BE
2020 — 2024
PES College of Engineering, Mandya
Master of Technology - MTech
2024 — 2026
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