Pavan Kulkarni
IC Packaging And PCB Layout Engg,Silicon photonics product group
- Role
- Ic Packaging and Pcb Layout Engg at Intel
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
About Pavan Kulkarni
Collecting inputs for design from client and estimating the design effort. • Logic symbol creations and Schematic capture. • Moderate Knowledge of Library creation. • PCB layout designs as per industrial standards and as per customer requirements. • Setting the constraints (Design rules) according to design requirements. • Designed very complex constraints designs up to 20 layers stack up design. • Good knowledge and experience on High Density Interconnect (HDI) technology using Blind/Berried vias. • Designed Printed Circuit Boards (PCBs) for various multi applications like Xilinx FPGA, ARM controller, SDRAM, DDR2, DDR3, FLASH, Ethernet, SD-card, USB, JTAG, ADC, PCI etc. • Good knowledge in Signal Integrity guidelines on PCB design (reflection noise, crosstalk noise, ground bounce etc.) • Good knowledge in EMI/EMC guidelines and implementation on PCB design. • Good knowledge in Power plane and Power supply requirements • Good knowledge in Analog, Digital and Analog-Digital mixed signals • Designing the PCB’s according to DFM (Design for Manufacturing) and DFA (Design for Assembly) techniques. • Deciding the PCBs Layer Stack-ups according to complexity of design and impedance matching requirements. • Validating the data for PCB manufacturing. • Developed and implemented standards and methodology for Schematics and PCB Documentation. • Involved in PCB fabrication process. • Now Started To Work On IC Packaging. Passion Towards Work.
Experience
Ic Packaging and Pcb Layout Engg
Jul 2018 — Present
Education
Nutan Vidaylaya
Diploma, E&CE, First Class
2003 — 2006
Nutan Vidlaylaya
High School, Kannada, 10th
2000 — 2003
KBNCE
Bachelor of Engineering (B.E.), Electrical, Electronic and Communications Engineering Technology/Technician
2007 — 2011
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