Pavan Kalyan
MTech (MNNIT Allahabad) | Technical Intern ( AMS Circuit Designer ,Synopsys) | Analog circuits | Verilog | System Verilog | UVM
- Role
- Technical Intern at Synopsys Inc
- Location
- Tirupati Urban, IN
- LinkedIn followers
- 500 followers
About Pavan Kalyan
I am currently seeking opportunities in the semiconductor industry. I am driven by a…
Experience
Technical Intern
Feb 2025 — Present · Noida, IN
Developed testbenches,configured simulation environments, and performed detailed waveform analysis for analog mixed signal designs.Conducted analysis and simulations of charge pump phase-locked loop (PLL) circuits and documented verification results
Education
Motilal Nehru National Institute Of Technology
Master of Technology - MTech
2022 — 2024
VLSI GURU Training Institute
System verilog
2023 — 2023
VLSI Guru Training Institute
Universal verification Methodology(UVM)
2024 — 2024
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