Pavan K.
Design Verification Engineer for PCIe Gen5
- Role
- Senior Enginner at Quest Global
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Pavan K.
working as Verification Engineer for PCIe at Tech Mahindra Cerium Systems. I Love Challenging work.It will grill my skills to the next level. I am a quick Learner. I Always beleives \" Work should be TRUE Reflection of Yourself \"*3.9+ Years of Experience (as of Dec\'24) feb\'20 to Mar\'21:* Started training in VLSI at CDAC ACTS pune. Technical Skills:* digital electronics * C (Advanced)* C++* Verilog * System Verilog * UVM Tools Used:* Questa sim * Xilinx ISE Mar\'21 to Present:* Joined in Cerium systems as a Design Verification Engineer. Technical Skills:* SV * UVM * PCIe protocol * AXI Protocol Tools Used:* VCS Simulator * Verdi * DVE
Experience
Senior Enginner
Jan 2025 — Present · Bangalore Urban, IN
Education
GMR Institute of Technology (GMRIT), GMR Nagar, Rajam, Srikakulam Dt.,-532127 (CC-34))
SBTET DIPLOMA IN ECE
2012 — 2015
VIJETHA HIGH SCHOOL
SECONADARY SCHOOL OF CERTIFICATE
2011 — 2012
Sir C.R.R. College Of Engineerng
B.E/B.tech
2015 — 2018
Centre for Development of Advanced Computing
PG-DVLSI
2020 — 2020
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