Paul J Dickinson
Hardware Testability Architect / Chip Productization Expert
- Role
- Dft Engineer at Quest Global
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Paul J Dickinson
Hardware Architect with >20 years of experience, recognised as an expert in semiconductor chip testability architectures, and in using DFT features for effective silicon debug and productization.
Experience
Dft Engineer
Jun 2024 — Present
DFT DV contracted to a large tech company in Silicon Valley
Education
University of Southampton
PhD
1990 — 1994
University College London, U. of London
BEng
1987 — 1990
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