Patrick Khayat
Senior Member of Technical Staff at Micron Technology | Signal Processing & ECC Expert for Storage Industry
- Role
- Senior Member of Technical Staff - System & Media Architect at Micron Technology
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
About Patrick Khayat
Professional Summary:• Seasoned storage architect with 20+ years of leadership in delivering DSP, ECC, and media management solutions to maximize performance, endurance, and reliability across SSD, HDD, and emerging memory platforms. • Strong cross-functional technical lead aligning SSD ASIC/FW and NAND Technology Development teams to launch high-performance storage solutions tailored for Enterprise, Data Center, Mobile, and Client markets.• Prolific innovator holding 80+ patents bridging the gap between controller ASIC/FW and NAND component design to define and execute multi-generational product roadmaps.Expertise:• Memory Architecture & Management: NAND/HDD media management including FTL design, bad block management, wear leveling, garbage collection, and data refresh strategies.• Signal Processing & Information Theory: Advanced proficiency in Digital Signal Processing (DSP), Error Correction Codes (ECC) IP development, and high-performance channel modeling.• Media Characterization: Deep understanding of media stress mechanisms; hands-on experience with media characterization and large-scale data processing for algorithm prototyping.• AI & Machine Learning: Application of Neural Networks (Deep Learning), Regression, and Random Forest models to optimize storage system metrics and predictive modeling.• Modeling & Analysis: Expert-level statistical analysis/modeling, system modeling, and Monte-Carlo Analysis for performance and reliability quantification.• Product Lifecycle & Quality: Comprehensive knowledge spanning Controller ASIC/FW, NAND design, technology development (TD), and enterprise-level qualification processes.
Experience
Senior Member of Technical Staff - System & Media Architect
Nov 2019 — Present · San Diego, CA, US
Responsible for architecting cross-layer media management innovations across controller and NAND boundaries, delivering significant improvements in performance, tail latency (QoS), and reliability for TLC & QLC Enterprise, Client, and Mobile products. I specialize in utilizing advanced modeling techniques and NAND characterization to conduct early ROI assessments, secure feature definition and approvals, and intercept the roadmap with high-value IP while working with several cross-functional teams.Served as a committee members for internal System Patents team and Non-Volatile Technology Seminar. and System Patent
Education
UC San Diego
B.S., Computer Engineering
1995 — 2000
UC San Diego
MS, Electrical Engineering
2003 — 2005
Skills
- C++
- Error Correction
- Ic
- C/C++
- Nand Flash Memory
- Vhdl Programming Language
- Rtl Design
- Codes
- System Architecture
- Ldpc Codes
- Matlab
- Systems Modeling
- Semiconductors
- System Design
- System Engineering
- Fpga
- Asic
- Signal Processing
- Magnetic Recording
- Error Correction Codes
- Soc
- Algorithms
- Nand Flash Controller
- Turbo Codes
- Embedded Systems
- Digital Signal Processing
- Systems Engineering
- System Modeling
- Channel Modeling
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