Pat Pisano

STTD Director at Intel Corporation

Role
Sttd Test Strategy Director at Intel
Location
Beaverton, OR, US
LinkedIn followers
500 followers

About Pat Pisano

Experienced Engineering Manager with a demonstrated history of working in the…

Experience

  1. Sttd Test Strategy Director

    Intel

    Sep 2020 — Present

Education

  • University of Nevada, Reno

    Ph.D., Chemical Physics

    1993 — 1998

  • Marquette University

    B.S., Chemistry

    1989 — 1993

Skills

  • Engineering Management
  • Nanotechnology
  • Integrated Circuits (Ic)
  • Cross-Functional Team Leadership
  • Semiconductor Fabrication
  • Characterization
  • Program Management
  • Jmp
  • Semiconductor Process
  • Lithography
  • Spc
  • Process Integration
  • Change Management
  • Semiconductors
  • Semiconductor Device
  • Thin Films
  • Failure Analysis
  • Semiconductor Industry
  • Statistical Process Control (Spc)
  • Design of Experiments
  • Design Rules
  • Intel
  • Metrology
  • Transistor Performance
  • Process Improvement
  • Ic

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Pat Pisano — Sttd Test Strategy Director at Intel in Beaverton, OR, US | Unifers