Pasupuleti Bala Saraswathi
Design Verification Engineer @MosChip®
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WORK HISTORY
Design Verification Engineer @MosChip®
Hyderabad, IN
EDUCATION
IIIT - Basar
Bachelor of Technology - BTech
ABOUT PASUPULETI BALA SARASWATHI
I am an experienced Design Verification Engineer with a strong background in verifying complex digital designs using industry-standard protocols including UCIE PHY, Display Port, AMBA APB, AMBA AXI4, and Timer. Proficient in SystemVerilog, UVM, assertions, and coverage, I excel in developing robust verification environments that ensure the highest quality of silicon. I am passionate about taking on challenges and thrive in dynamic environments where I can contribute to innovative solutions and collaborate effectively with cross-functional teams.Industry tools : Cadence, Questasim, Synopsys
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