Parvenitha Yagnam
“Physical Design & Backend VLSI Engineer | Driving timing closure, PPA optimization & efficient ASIC implementation | Skilled in STA, CTS, Floorplanning, Placement, Routing”
- Role
- Internship Trainee at Maven Silicon
- Location
- Hyderabad, IN
- LinkedIn followers
- 500 followers
EducationView LinkedIn profile
Experience
Internship Trainee
Aug 2024 — Present · Bengaluru, IN
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