Parth Saraiya
Principal Verification Engineer at Western Digital
- Role
- Senior Design Verification Engineer at NVIDIA
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Senior Design Verification Engineer
Jan 2026 — Present · Bengaluru, IN
Education
Charotar University of Science and Technology
Engineer’s Degree, Electronics and Communications Engineering
2011 — 2015
Knowledge High School
High School, Science Stream
2009 — 2011
Skills
- Universal Verification Methodology (Uvm)
- Matlab
- Vhdl
- Linux
- Ip Verification
- Verilog
- System on Chip Verification
- C++
- Microcontrollers
- System Verification
- C
- Microsoft Office
- Microsoft Excel
- Perl
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