Parthibaraja Ramasamy
Lead at Intel Corporation
- Role
- System Validation Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Parthibaraja Ramasamy
Experience in pre-silicon and post silicon validation of IA/ARM architectures meant for…
Experience
System Validation Engineer
Mar 2019 — Present · Bangalore, IN
Pre-silicon validation using simulation & emulation environment and post-silicon validation of intel QAT Accelerator IP (Compression/Decompression algorithms, NIST standard crypto algorithms) meant for Infrastructure processing Unit IPU
Skills
- Rlc
- Protocol Stacks
- Rnc
- Call Processing
- Nbap
- Rrc
- Gprs
- Edge
- Android
- 3g
- Node B
- Agile Methodologies
- Hspa
- Mac
- C
- Lte
- 3gpp
- Universal Mobile Telecommunications System (Umts)
- Testing
- Gsm
- Embedded Systems
- Wcdma
- Hsdpa
- Clearcase
- Umts
- Wideband Code Division Multiple Access (Wcdma)
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