Partha Sarathi Patra

About Partha Sarathi Patra

Around 8.5yrs. of total exp. in VLSI ASIC Domain including ASIC Verification, Gate Level Simulation & Post Silicon Validation using various EDA tools.CAREER OBJECTIVE:I am willing to pursue a career in VLSI & IT industry, where opportunities exist for innovation, knowledge enhancement, and professional growth and to utilize my technical skills to the best possible benefit of the organization I serve.PERSONAL EXPERIENCE:• Currently working as a “Verification Engineer” deputed at Client Location Intel Technology, Bangalore through Wipro Technologies, Bangalore.• Experience in Gate-Level-Simulation.• Experience in ASIC-Verification.• Have around 2.5 years of relevant experience as an “ASIC Verification Engineer” at eInfochips Ltd, Ahmedabad since from September, 2012 to February, 2015.• Experience in Gate-Level-Simulation and SDF Back Annotation.• Experience in VIP and SoC verification based on System Verilog, UVM and Constrained Driven Verification Environment.• Basic expertise in protocols like MHL (2.0, 3.0), HDMI 1.3, CEC, EDID, EIA-CEA-861E, VESA Standards, IEC-(60958, 61937)• Experience working on VCS Tool Feature Validation using VCS Coverage Metrics & VMM Planner.• Have 19 months of relevant experience as a “VLSI Engineer” at IIVDT, Bangalore.• Have 18 months of working experience as a ‘’Service Engineer” in the Electrical Section at HBL Power Systems Ltd, Kanpur from Jun-09 to Dec-10.

Experience

1. Staff Engineer

   Qualcomm

   Dec 2023 — Present · Bengaluru, IN

Education

• Town High School Balasore

  10th

• Biju Pattnaik University of Technology, Orissa

  GRADUATION(B.TECH), ELECTRONICS & TELECOMMUNICATION

  2005 — 2009

Skills

• Vlsi
• Asic
• Very-Large-Scale Integration (Vlsi)
• Cea
• Verilog
• Application-Specific Integrated Circuits (Asic)
• Soc
• System Verilog
• System on a Chip (Soc)
• Hdmi
• Eda
• Linux
• Modelsim
• Mixed Signal
• Static Timing Analysis
• Physical Design
• Debugging
• Gate Level Simulation
• Uvm
• Systemverilog
• Questasim
• C++
• Mhl 2.0
• Cadence
• Edid
• Vcs
• Spark Atomic Camera